Purpose

This document describes the VBIOS Memory clock table entries. The Memory Clock Table starts with a header, followed immediately by an array of entries.

Memory Clock Table Header

FieldName Size (in bits) Description

Version

8
Memory Clock Table Version (0x11)

Header Size

8
Size of Memory Clock Table Header in bytes (26)

Base Entry Size

8
Size of Memory Clock Table Base Entry in bytes (20)

Strap Entry Size

8
Size of Memory Clock Table Strap Entry in bytes (26)

Strap Entry Count

8
Number of Memory Clock Table Strap Entries per Memory Clock Table Entry

Entry Count

8
Number of Memory Clock Table Entries (combined Base Entry plus Strap Entry Count of Strap Entries)

Reserved

160

Memory Clock Table Base Entry

Each entry is made up of a single Base Entry and multiple Strap Entries. The entire size of an entry is given by ( MemoryClockTableHeader.BaseEntrySize + MemoryClockTableHeader.StrapEntrySize × MemoryClockTableHeader.StrapEntryCount ). Each entry provides information needed for operating the memory at a frequency between MemoryClockTableBaseEntry.Minimum.Frequency and MemoryClockTableBaseEntry.Maximum.Frequency, inclusively.

FieldName Size (in bits) Description

Min Frequency

16
[15:14] = Reserved
[13:0] = Frequency (MHz)

Max Frequency

16
[15:14] = Reserved
[13:0] = Frequency(MHz)

Reserved

40

Read/Write Config0

32
[8:0] = Read Setting0
[17:9] = Write Settings0
[19:18] = Reserved
[24:20] = ReadSettings1
[31:25] = Reserved

Read/Write Config1

32
[3:0] = Read Settings0
[7:4] = Write Settings0
[11:8] = Read Settings1
[15:12] = Write Settings1
[19:16] = Read Settings2
[23:20] = Write Settings2
[31:24] = Timing Settings0

Reserved

24

Memory Clock Table Strap Entry

FieldName Size (in bits) Description

MemTweak Index

8
[7:0] MemTweak Index

Flags0

8
[6:0] = Reserved
[7:7] = Alignment Mode

0x0 = Phase detector (Default)
0x1 = Pin

Reserved

48

Flags4

8
[6:0] = Reserved
[7:7] = MRS7 GDDR5

0x0 = Disable (Default)
0x1 = Enable

Reserved

8

Flags5

8
[5:0] = Reserved
[6:6] = GDDR5x Internal VrefC

0x0 = Disable (Default) (70% VrefC)
0x1 = Enable (50% VrefC)

[7:7] = Reserved

Reserved

120